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<div class="title">xsysmonpsu_intr.c File Reference</div>  </div>
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<a name="details" id="details"></a><h2 class="groupheader">Overview</h2>
<div class="textblock"><p>This file contains functions related to SYSMONPSU interrupt handling. </p>
<pre>
MODIFICATION HISTORY:</pre><pre>Ver   Who    Date       Changes
<hr/>

1.0   kvn    12/15/15 First release
</pre> </div><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:a97be122426bd5302e93b45ba5a3fc8ec"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xsysmonpsu__intr_8c.html#a97be122426bd5302e93b45ba5a3fc8ec">XSysMonPsu_IntrEnable</a> (<a class="el" href="struct_x_sys_mon_psu.html">XSysMonPsu</a> *InstancePtr, u64 Mask)</td></tr>
<tr class="memdesc:a97be122426bd5302e93b45ba5a3fc8ec"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function enables the specified interrupts in the device.  <a href="#a97be122426bd5302e93b45ba5a3fc8ec">More...</a><br /></td></tr>
<tr class="separator:a97be122426bd5302e93b45ba5a3fc8ec"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a95f581ea48eb8d57c2fab2dcaefdeccd"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xsysmonpsu__intr_8c.html#a95f581ea48eb8d57c2fab2dcaefdeccd">XSysMonPsu_IntrDisable</a> (<a class="el" href="struct_x_sys_mon_psu.html">XSysMonPsu</a> *InstancePtr, u64 Mask)</td></tr>
<tr class="memdesc:a95f581ea48eb8d57c2fab2dcaefdeccd"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function disables the specified interrupts in the device.  <a href="#a95f581ea48eb8d57c2fab2dcaefdeccd">More...</a><br /></td></tr>
<tr class="separator:a95f581ea48eb8d57c2fab2dcaefdeccd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a78b39afe5e1c62f44a320311d74e2402"><td class="memItemLeft" align="right" valign="top">u64&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xsysmonpsu__intr_8c.html#a78b39afe5e1c62f44a320311d74e2402">XSysMonPsu_IntrGetEnabled</a> (<a class="el" href="struct_x_sys_mon_psu.html">XSysMonPsu</a> *InstancePtr)</td></tr>
<tr class="memdesc:a78b39afe5e1c62f44a320311d74e2402"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns the enabled interrupts read from the Interrupt Enable Register (IER).  <a href="#a78b39afe5e1c62f44a320311d74e2402">More...</a><br /></td></tr>
<tr class="separator:a78b39afe5e1c62f44a320311d74e2402"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3ef44a74426b13480363747a5dedc5d0"><td class="memItemLeft" align="right" valign="top">u64&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xsysmonpsu__intr_8c.html#a3ef44a74426b13480363747a5dedc5d0">XSysMonPsu_IntrGetStatus</a> (<a class="el" href="struct_x_sys_mon_psu.html">XSysMonPsu</a> *InstancePtr)</td></tr>
<tr class="memdesc:a3ef44a74426b13480363747a5dedc5d0"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns the interrupt status read from Interrupt Status Register(ISR).  <a href="#a3ef44a74426b13480363747a5dedc5d0">More...</a><br /></td></tr>
<tr class="separator:a3ef44a74426b13480363747a5dedc5d0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7c41996bf95cd7119dba302246345a9d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xsysmonpsu__intr_8c.html#a7c41996bf95cd7119dba302246345a9d">XSysMonPsu_IntrClear</a> (<a class="el" href="struct_x_sys_mon_psu.html">XSysMonPsu</a> *InstancePtr, u64 Mask)</td></tr>
<tr class="memdesc:a7c41996bf95cd7119dba302246345a9d"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function clears the specified interrupts in the Interrupt Status Register (ISR).  <a href="#a7c41996bf95cd7119dba302246345a9d">More...</a><br /></td></tr>
<tr class="separator:a7c41996bf95cd7119dba302246345a9d"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<h2 class="groupheader">Function Documentation</h2>
<a id="a7c41996bf95cd7119dba302246345a9d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a7c41996bf95cd7119dba302246345a9d">&#9670;&nbsp;</a></span>XSysMonPsu_IntrClear()</h2>

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          <td class="memname">void XSysMonPsu_IntrClear </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_sys_mon_psu.html">XSysMonPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u64&#160;</td>
          <td class="paramname"><em>Mask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function clears the specified interrupts in the Interrupt Status Register (ISR). </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_sys_mon_psu.html" title="The XSysmonPsu driver instance data. ">XSysMonPsu</a> instance. </td></tr>
    <tr><td class="paramname">Mask</td><td>is the 64 bit-mask of the interrupts to be cleared. Bit positions of 1 will be cleared. Bit positions of 0 will not change the previous interrupt status. This mask is formed by OR'ing the XSYSMONPSU_ISR_0_* and XSYSMONPSU_ISR_1_* bits which are defined in <a class="el" href="xsysmonpsu__hw_8h.html" title="This header file contains the identifiers and basic driver functions (or macros) that can be used to ...">xsysmonpsu_hw.h</a>.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_sys_mon_psu___config.html#a8b2fb5ceb1c132536b320f0b317bb1c6">XSysMonPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_sys_mon_psu.html#a37b1b3b387db33d8aedcbe611b27e45b">XSysMonPsu::Config</a>, <a class="el" href="struct_x_sys_mon_psu.html#ae4e48efa3298714b2e190f2dbfc9566a">XSysMonPsu::IsReady</a>, <a class="el" href="xsysmonpsu__hw_8h.html#a83ea9d678f45ad885e86555b51d308cd">XSYSMONPSU_ISR_0_OFFSET</a>, and <a class="el" href="xsysmonpsu__hw_8h.html#ae9106d31caad5928fff1fc352968f9c1">XSysmonPsu_ReadReg</a>.</p>

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<a id="a95f581ea48eb8d57c2fab2dcaefdeccd"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a95f581ea48eb8d57c2fab2dcaefdeccd">&#9670;&nbsp;</a></span>XSysMonPsu_IntrDisable()</h2>

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          <td class="memname">void XSysMonPsu_IntrDisable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_sys_mon_psu.html">XSysMonPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u64&#160;</td>
          <td class="paramname"><em>Mask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function disables the specified interrupts in the device. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_sys_mon_psu.html" title="The XSysmonPsu driver instance data. ">XSysMonPsu</a> instance. </td></tr>
    <tr><td class="paramname">Mask</td><td>is the 64 bit-mask of the interrupts to be disabled. Bit positions of 1 will be disabled. Bit positions of 0 will keep the previous setting. This mask is formed by OR'ing XSYSMONPSU_IDR_0_* and XSYSMONPSU_IDR_1_* bits defined in <a class="el" href="xsysmonpsu__hw_8h.html" title="This header file contains the identifiers and basic driver functions (or macros) that can be used to ...">xsysmonpsu_hw.h</a>.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_sys_mon_psu___config.html#a8b2fb5ceb1c132536b320f0b317bb1c6">XSysMonPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_sys_mon_psu.html#a37b1b3b387db33d8aedcbe611b27e45b">XSysMonPsu::Config</a>, <a class="el" href="struct_x_sys_mon_psu.html#ae4e48efa3298714b2e190f2dbfc9566a">XSysMonPsu::IsReady</a>, <a class="el" href="xsysmonpsu__hw_8h.html#aa5fe21686201b6560cc6e5745371e4e5">XSYSMONPSU_IDR_0_OFFSET</a>, and <a class="el" href="xsysmonpsu__hw_8h.html#ae9106d31caad5928fff1fc352968f9c1">XSysmonPsu_ReadReg</a>.</p>

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<h2 class="memtitle"><span class="permalink"><a href="#a97be122426bd5302e93b45ba5a3fc8ec">&#9670;&nbsp;</a></span>XSysMonPsu_IntrEnable()</h2>

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      <table class="memname">
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          <td class="memname">void XSysMonPsu_IntrEnable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_sys_mon_psu.html">XSysMonPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u64&#160;</td>
          <td class="paramname"><em>Mask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function enables the specified interrupts in the device. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_sys_mon_psu.html" title="The XSysmonPsu driver instance data. ">XSysMonPsu</a> instance. </td></tr>
    <tr><td class="paramname">Mask</td><td>is the 64 bit-mask of the interrupts to be enabled. Bit positions of 1 will be enabled. Bit positions of 0 will keep the previous setting. This mask is formed by OR'ing XSYSMONPSU_IER_0_* and XSYSMONPSU_IER_1_* bits defined in <a class="el" href="xsysmonpsu__hw_8h.html" title="This header file contains the identifiers and basic driver functions (or macros) that can be used to ...">xsysmonpsu_hw.h</a>.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_sys_mon_psu___config.html#a8b2fb5ceb1c132536b320f0b317bb1c6">XSysMonPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_sys_mon_psu.html#a37b1b3b387db33d8aedcbe611b27e45b">XSysMonPsu::Config</a>, <a class="el" href="struct_x_sys_mon_psu.html#ae4e48efa3298714b2e190f2dbfc9566a">XSysMonPsu::IsReady</a>, <a class="el" href="xsysmonpsu__hw_8h.html#ac651706d7049befe6bcade8d0bf057fc">XSYSMONPSU_IER_0_OFFSET</a>, and <a class="el" href="xsysmonpsu__hw_8h.html#ae9106d31caad5928fff1fc352968f9c1">XSysmonPsu_ReadReg</a>.</p>

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<h2 class="memtitle"><span class="permalink"><a href="#a78b39afe5e1c62f44a320311d74e2402">&#9670;&nbsp;</a></span>XSysMonPsu_IntrGetEnabled()</h2>

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          <td class="memname">u64 XSysMonPsu_IntrGetEnabled </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_sys_mon_psu.html">XSysMonPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function returns the enabled interrupts read from the Interrupt Enable Register (IER). </p>
<p>Use the XSYSMONPSU_IER_0_* and XSYSMONPSU_IER_1_* constants defined in <a class="el" href="xsysmonpsu__hw_8h.html" title="This header file contains the identifiers and basic driver functions (or macros) that can be used to ...">xsysmonpsu_hw.h</a> to interpret the returned value.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_sys_mon_psu.html" title="The XSysmonPsu driver instance data. ">XSysMonPsu</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>A 64-bit value representing the contents of the Interrupt Mask Registers (IMR1 IMR0).</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_sys_mon_psu___config.html#a8b2fb5ceb1c132536b320f0b317bb1c6">XSysMonPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_sys_mon_psu.html#a37b1b3b387db33d8aedcbe611b27e45b">XSysMonPsu::Config</a>, <a class="el" href="struct_x_sys_mon_psu.html#ae4e48efa3298714b2e190f2dbfc9566a">XSysMonPsu::IsReady</a>, <a class="el" href="xsysmonpsu__hw_8h.html#a5e842a49b82a192506f90c1223dd2464">XSYSMONPSU_IMR_0_OFFSET</a>, and <a class="el" href="xsysmonpsu__hw_8h.html#ae9106d31caad5928fff1fc352968f9c1">XSysmonPsu_ReadReg</a>.</p>

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<h2 class="memtitle"><span class="permalink"><a href="#a3ef44a74426b13480363747a5dedc5d0">&#9670;&nbsp;</a></span>XSysMonPsu_IntrGetStatus()</h2>

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          <td class="memname">u64 XSysMonPsu_IntrGetStatus </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_sys_mon_psu.html">XSysMonPsu</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function returns the interrupt status read from Interrupt Status Register(ISR). </p>
<p>Use the XSYSMONPSU_ISR_0_* and XSYSMONPSU_ISR_1_ constants defined in <a class="el" href="xsysmonpsu__hw_8h.html" title="This header file contains the identifiers and basic driver functions (or macros) that can be used to ...">xsysmonpsu_hw.h</a> to interpret the returned value.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_sys_mon_psu.html" title="The XSysmonPsu driver instance data. ">XSysMonPsu</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>A 64-bit value representing the contents of the Interrupt Status Registers (ISR1 ISR0).</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_sys_mon_psu___config.html#a8b2fb5ceb1c132536b320f0b317bb1c6">XSysMonPsu_Config::BaseAddress</a>, <a class="el" href="struct_x_sys_mon_psu.html#a37b1b3b387db33d8aedcbe611b27e45b">XSysMonPsu::Config</a>, <a class="el" href="struct_x_sys_mon_psu.html#ae4e48efa3298714b2e190f2dbfc9566a">XSysMonPsu::IsReady</a>, <a class="el" href="xsysmonpsu__hw_8h.html#a83ea9d678f45ad885e86555b51d308cd">XSYSMONPSU_ISR_0_OFFSET</a>, and <a class="el" href="xsysmonpsu__hw_8h.html#ae9106d31caad5928fff1fc352968f9c1">XSysmonPsu_ReadReg</a>.</p>

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